Makefile
Textbook: Managing Projects with GNU Make
Textbook Notes
Below is an example of a simple makefile
hello: hello.c
gcc hello.c -o hello
When no parameters are provided, make will build the first target it sees,
which in this case, is hello.
- goal
- a target that
make strives ultimately to update. By default, make will
start with the first target, and this is known as the default goal. There
are various arguments to specify the goals to override the behavior, as
well as the .DEFAULT_GOAL special variable - rule
- a specification contained within a makefile that declares when and how a
target of a rule is to be remade. A rule contains targets,
prerequisites, and recipes. On the first line of a rule, there are
targets, and prerequisites, separated by a colon. An optional list of
recipes can be provided in a newline-delimited format, each of which is
indented by a leading tab character, in the lines below.
- target
- The file that is to be made by the corresponding prerequisites. Appears on
the left-hand side of the first line of a given rule. There are
targets with special meanings
- prerequisite
- A file that is used as input to create the target. If a prerequisite is
found to have been modified more recently than its targets, these
targets will be considered out-of-date and will be subsequently rebuilt.
There are multiple types of prerequisites.
- recipe
- An action that
make carries out. A recipe may have more than one command,
either on the same line or each on its own line. Please note: you need
to put a tab character at the beginning of every recipe line! This is an
obscurity that catches the unwary. If you prefer to prefix your recipes with
a character other than tab, you can set the .RECIPEPREFIX variable to an
alternate character
What a Rule Looks Like
- default goal
- the first target declared within a makefile
- default rule
- the first rule declared with a makefile
At a high level, what Makefiles contain can be encapsulated by the following five components:
explicit rules, implicit rules, variable definitions, directives, and
comments.
See rule syntax for more information. See also: using implicit rules
Automatic Variables
Automatic variables are set by make
after a rule is matched. They provide access to elements from the
target and prerequisite lists so you don't have to explicitly specify
any filenames. They are very useful for avoiding code duplication, but
are critical when defining more general pattern rules (discussed later).
There are seven "core" automatic variables:
$@The filename representing the target.
$%The filename element of an archive member specification.
$<The filename of the first prerequisite.
$?The names of all prerequisites that are newer than the target, separated by spaces.
$^The filenames of all the prerequisites, separated by spaces. This list has
duplicate filenames removed since for most uses, such as compiling,
copying, etc., duplicates are not wanted.
$+Similar to $^, this is the names of all the prerequisites separated by spaces, except that $+
includes duplicates. This variable was created for specific situations
such as arguments to linkers where duplicate values have meaning.
$*The
stem of the target filename. A stem is typically a filename without its
suffix. (We'll discuss how stems are computed later in the section Pattern Rules.) Its use outside of pattern rules is discouraged.
Managing Programs and Files
?= is the conditional assignment operator
Structuring the installation
GNU outlines which directories a project should have, and what their names are, in the GNU standards document
With that being said, I commonly see these folders
/src/bin/include/lib/libexec/share/etc/sbin/var
And less commonly, I'll see these as well: